MIL-PRF-123 Capacitors, Fixed, Ceramic Dielectric, \(Temperature Stable And General Purpose\), High Reliability, General Specification ForThis specification covers the general requirements for high reliability, general purpose \(BX and BR\) and temperature stable \(BP and BG\) ceramic dielectric fixed capacitors, leaded and nonleaded for space, missile, and other high reliability applications. Capacitors covered by this specification may be used in critical frequency determining applications, timing circuits, and other applications where absolute stability is required \(BP and BG\), and in applications where appreciable variations in capacitance with respect to temperature, voltage, frequency, and life can be tolerated \(BX and BR\). Life tests in this specification are performed at two times rated voltage at maximum rated temperature, and an assumed acceleration factor of 8:1 is used to relate life test data obtained at two times rated voltage to performance at rated voltage.

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MIL-PRF-123D

e. Extraneous particles, such as solder spikes or solder balls, shall not exceed .015 inch (0.38 mm) in any

dimension, nor shall the total encapsulation thickness be reduced to less than the thickness T or TR as

defined in 3.9.c. Total encapsulation thickness is the combined measurement of the encapsulation thickness

on either side of the particle.

3.10 Thermal shock and voltage conditioning. When tested as specified in 4.6.6, capacitors shall withstand the

extremes of high and low temperature without visible damage and meet the following requirements with the percent

defective allowed as shown in table XVI:

a. Dielectric withstanding voltage (at +25�C): As specified in 3.13.

b. Insulation resistance (at +25�C): Shall be not less than the initial requirement.

c. Insulation resistance (at elevated ambient temperature): Shall be not less than the initial requirement (see

3.14).

d. Dissipation factor (at +25�C): Shall not exceed the value specified (see 3.12).

e. Capacitance (at +25�C): Shall be within the tolerance specified (see 3.1).

Capacitance values of not more than 5 percent or .5 pF, whichever is greater, for BX and BR characteristics or of no

more than 1 percent or .3 pF, whichever is greater, for BP and BG characteristics beyond specified tolerance limit

shall be removed from the lot but shall not be considered defective for determination of the percent defective

allowed.

3.11 Capacitance. When measured as specified in 4.6.7, the capacitance shall be within the specified tolerance

3.12 Dissipation factor (DF). When determined as specified in 4.6.8, the dissipation factor shall not exceed 2.5

percent for BX and BR characteristics, 0.15 percent for BP characteristic, and 0.05 percent for BG characteristic,

unless otherwise specified (see 3.1). For capacitors of less than 10 pF (chips) and 30 pF (leaded devices), the

dissipation factor shall not exceed 0.25 percent for BP and 0.15 percent for BG. (A negative reading is not

considered a failure.)

3.13 Dielectric withstanding voltage (DWV). Capacitors shall withstand the direct current (dc) potential specified

in 4.6.9 without damage or breakdown.

3.14 Insulation resistance (IR). When measured as specified in 4.6.10, the insulation resistance shall be not less

than the value specified:

a. At +25�C: 100,000 megohms or 1,000 megohm-microfarads, whichever is less.

b. At +125�C: 10,000 megohms or 100 megohm-microfarads, whichever is less.

3.15 Destructive physical analysis. When examined as specified in 4.6.11, capacitors shall meet the

requirements specified herein.

3.16 Terminal strength. When capacitors are tested as specified in 4.6.12, there shall be no loosening or

rupturing of the terminals.

3.17 Solderability.

3.17.1 Solderability (leaded capacitors). When leaded capacitors are tested as specified in 4.6.13.1, the dipped

surface of the leads shall be at least 90 percent covered with a new, smooth, solder coating. The remaining 10

percent may contain only small pinholes or rough spots; these shall not be concentrated in one area. Bare base

metal where the solder dip failed to cover the original coating is an indication of poor solderability, and shall be

cause for failure. In case of dispute, the percent of coverage with pinholes or rough spots shall be determined by

actual measurement of these areas, as compared to the total area.